D Flip-Flop

The D flip-flop is the most common flip-flop in use today. It is better known as delay flip-flop (as its output Q looks like a delay of input D) or data latch.The Q output takes on the state of the D input at the moment of a positive edge at the clock pin (or negative edge if the clock input is active low).The D flip-flop can be interpreted as a primitive memory cell.

module dff (data, clk, reset, q);
input data;
input clk;
input reset;
output q;
reg q;
always@(posedge clk)
begin
if(~reset)
begin
q<=1'b0;
end
else
begin
q<=data;
end   
end
endmodule
You could download file dff.v and testbench.tb here.